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/**
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****************************************************************************** |
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* @file stm32wbxx_hal_i2c.h |
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* @author MCD Application Team |
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* @brief Header file of I2C HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
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* All rights reserved.</center></h2> |
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* |
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* This software component is licensed by ST under BSD 3-Clause license, |
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* the "License"; You may not use this file except in compliance with the |
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* License. You may obtain a copy of the License at: |
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* opensource.org/licenses/BSD-3-Clause |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef STM32WBxx_HAL_I2C_H |
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#define STM32WBxx_HAL_I2C_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32wbxx_hal_def.h" |
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/** @addtogroup STM32WBxx_HAL_Driver
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* @{ |
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*/ |
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/** @addtogroup I2C
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* @{ |
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*/ |
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/* Exported types ------------------------------------------------------------*/ |
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/** @defgroup I2C_Exported_Types I2C Exported Types
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* @{ |
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*/ |
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/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
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* @brief I2C Configuration Structure definition |
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* @{ |
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*/ |
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typedef struct |
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{ |
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uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
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This parameter calculated by referring to I2C initialization |
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section in Reference manual */ |
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uint32_t OwnAddress1; /*!< Specifies the first device own address.
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This parameter can be a 7-bit or 10-bit address. */ |
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uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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This parameter can be a value of @ref I2C_ADDRESSING_MODE */ |
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uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ |
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uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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This parameter can be a 7-bit address. */ |
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uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
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This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ |
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uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ |
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uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ |
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} I2C_InitTypeDef; |
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/**
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* @} |
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*/ |
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/** @defgroup HAL_state_structure_definition HAL state structure definition
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* @brief HAL State structure definition |
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* @note HAL I2C State value coding follow below described bitmap :\n |
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* b7-b6 Error information\n |
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* 00 : No Error\n |
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* 01 : Abort (Abort user request on going)\n |
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* 10 : Timeout\n |
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* 11 : Error\n |
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* b5 Peripheral initialization status\n |
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* 0 : Reset (peripheral not initialized)\n |
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* 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n |
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* b4 (not used)\n |
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* x : Should be set to 0\n |
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* b3\n |
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* 0 : Ready or Busy (No Listen mode ongoing)\n |
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* 1 : Listen (peripheral in Address Listen Mode)\n |
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* b2 Intrinsic process state\n |
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* 0 : Ready\n |
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* 1 : Busy (peripheral busy with some configuration or internal operations)\n |
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* b1 Rx state\n |
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* 0 : Ready (no Rx operation ongoing)\n |
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* 1 : Busy (Rx operation ongoing)\n |
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* b0 Tx state\n |
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* 0 : Ready (no Tx operation ongoing)\n |
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* 1 : Busy (Tx operation ongoing) |
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* @{ |
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*/ |
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typedef enum |
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{ |
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HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
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HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
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HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
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HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
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HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
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HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
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HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
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process is ongoing */ |
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HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
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process is ongoing */ |
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HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
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HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
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HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
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} HAL_I2C_StateTypeDef; |
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/**
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* @} |
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*/ |
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/** @defgroup HAL_mode_structure_definition HAL mode structure definition
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* @brief HAL Mode structure definition |
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* @note HAL I2C Mode value coding follow below described bitmap :\n |
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* b7 (not used)\n |
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* x : Should be set to 0\n |
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* b6\n |
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* 0 : None\n |
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* 1 : Memory (HAL I2C communication is in Memory Mode)\n |
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* b5\n |
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* 0 : None\n |
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* 1 : Slave (HAL I2C communication is in Slave Mode)\n |
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* b4\n |
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* 0 : None\n |
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* 1 : Master (HAL I2C communication is in Master Mode)\n |
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* b3-b2-b1-b0 (not used)\n |
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* xxxx : Should be set to 0000 |
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* @{ |
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*/ |
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typedef enum |
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{ |
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HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
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HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
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HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
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HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
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} HAL_I2C_ModeTypeDef; |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_Error_Code_definition I2C Error Code definition
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* @brief I2C Error Code definition |
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* @{ |
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*/ |
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#define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ |
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#define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ |
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#define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ |
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#define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ |
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#define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ |
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#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ |
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#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ |
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#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ |
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#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ |
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ |
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#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
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* @brief I2C handle Structure definition |
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* @{ |
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*/ |
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typedef struct __I2C_HandleTypeDef |
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{ |
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I2C_TypeDef *Instance; /*!< I2C registers base address */ |
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I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
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uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
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uint16_t XferSize; /*!< I2C transfer size */ |
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__IO uint16_t XferCount; /*!< I2C transfer counter */ |
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__IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
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be a value of @ref I2C_XFEROPTIONS */ |
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__IO uint32_t PreviousState; /*!< I2C communication Previous state */ |
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HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ |
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DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
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DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
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HAL_LockTypeDef Lock; /*!< I2C locking object */ |
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__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
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__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
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__IO uint32_t ErrorCode; /*!< I2C Error code */ |
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__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ |
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ |
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void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ |
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void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ |
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void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ |
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void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ |
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void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ |
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void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ |
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void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ |
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void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ |
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void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ |
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void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ |
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void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ |
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#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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} I2C_HandleTypeDef; |
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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/**
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* @brief HAL I2C Callback ID enumeration definition |
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*/ |
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typedef enum |
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{ |
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HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ |
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HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ |
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HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ |
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HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ |
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HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ |
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HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ |
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HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ |
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HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ |
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HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ |
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HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ |
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HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ |
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} HAL_I2C_CallbackIDTypeDef; |
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/**
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* @brief HAL I2C Callback pointer definition |
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*/ |
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typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ |
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typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ |
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#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup I2C_Exported_Constants I2C Exported Constants
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* @{ |
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*/ |
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/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
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* @{ |
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*/ |
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#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) |
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#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) |
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#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) |
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#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) |
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#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) |
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#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) |
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/* List of XferOptions in usage of :
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* 1- Restart condition in all use cases (direction change or not) |
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*/ |
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#define I2C_OTHER_FRAME (0x000000AAU) |
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#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
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* @{ |
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*/ |
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#define I2C_ADDRESSINGMODE_7BIT (0x00000001U) |
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#define I2C_ADDRESSINGMODE_10BIT (0x00000002U) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
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* @{ |
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*/ |
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#define I2C_DUALADDRESS_DISABLE (0x00000000U) |
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#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
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* @{ |
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*/ |
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#define I2C_OA2_NOMASK ((uint8_t)0x00U) |
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#define I2C_OA2_MASK01 ((uint8_t)0x01U) |
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#define I2C_OA2_MASK02 ((uint8_t)0x02U) |
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#define I2C_OA2_MASK03 ((uint8_t)0x03U) |
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#define I2C_OA2_MASK04 ((uint8_t)0x04U) |
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#define I2C_OA2_MASK05 ((uint8_t)0x05U) |
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#define I2C_OA2_MASK06 ((uint8_t)0x06U) |
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#define I2C_OA2_MASK07 ((uint8_t)0x07U) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
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* @{ |
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*/ |
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#define I2C_GENERALCALL_DISABLE (0x00000000U) |
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#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
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* @{ |
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*/ |
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#define I2C_NOSTRETCH_DISABLE (0x00000000U) |
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#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
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* @{ |
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*/ |
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#define I2C_MEMADD_SIZE_8BIT (0x00000001U) |
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#define I2C_MEMADD_SIZE_16BIT (0x00000002U) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
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* @{ |
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*/ |
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#define I2C_DIRECTION_TRANSMIT (0x00000000U) |
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#define I2C_DIRECTION_RECEIVE (0x00000001U) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
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* @{ |
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*/ |
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#define I2C_RELOAD_MODE I2C_CR2_RELOAD |
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#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND |
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#define I2C_SOFTEND_MODE (0x00000000U) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
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* @{ |
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*/ |
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#define I2C_NO_STARTSTOP (0x00000000U) |
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#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) |
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#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) |
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#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
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* @brief I2C Interrupt definition |
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* Elements values convention: 0xXXXXXXXX |
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* - XXXXXXXX : Interrupt control mask |
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* @{ |
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*/ |
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#define I2C_IT_ERRI I2C_CR1_ERRIE |
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#define I2C_IT_TCI I2C_CR1_TCIE |
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#define I2C_IT_STOPI I2C_CR1_STOPIE |
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#define I2C_IT_NACKI I2C_CR1_NACKIE |
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#define I2C_IT_ADDRI I2C_CR1_ADDRIE |
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#define I2C_IT_RXI I2C_CR1_RXIE |
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#define I2C_IT_TXI I2C_CR1_TXIE |
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/**
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* @} |
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*/ |
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/** @defgroup I2C_Flag_definition I2C Flag definition
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* @{ |
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*/ |
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#define I2C_FLAG_TXE I2C_ISR_TXE |
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#define I2C_FLAG_TXIS I2C_ISR_TXIS |
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#define I2C_FLAG_RXNE I2C_ISR_RXNE |
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#define I2C_FLAG_ADDR I2C_ISR_ADDR |
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#define I2C_FLAG_AF I2C_ISR_NACKF |
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#define I2C_FLAG_STOPF I2C_ISR_STOPF |
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#define I2C_FLAG_TC I2C_ISR_TC |
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#define I2C_FLAG_TCR I2C_ISR_TCR |
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#define I2C_FLAG_BERR I2C_ISR_BERR |
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#define I2C_FLAG_ARLO I2C_ISR_ARLO |
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#define I2C_FLAG_OVR I2C_ISR_OVR |
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#define I2C_FLAG_PECERR I2C_ISR_PECERR |
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#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
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#define I2C_FLAG_ALERT I2C_ISR_ALERT |
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#define I2C_FLAG_BUSY I2C_ISR_BUSY |
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#define I2C_FLAG_DIR I2C_ISR_DIR |
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/**
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* @} |
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*/ |
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/**
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* @} |
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*/ |
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/* Exported macros -----------------------------------------------------------*/ |
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/** @defgroup I2C_Exported_Macros I2C Exported Macros
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* @{ |
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*/ |
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/** @brief Reset I2C handle state.
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* @param __HANDLE__ specifies the I2C Handle. |
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* @retval None |
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*/ |
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
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#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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(__HANDLE__)->State = HAL_I2C_STATE_RESET; \ |
|||
(__HANDLE__)->MspInitCallback = NULL; \ |
|||
(__HANDLE__)->MspDeInitCallback = NULL; \ |
|||
} while(0) |
|||
#else |
|||
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
|||
#endif |
|||
|
|||
/** @brief Enable the specified I2C interrupt.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @param __INTERRUPT__ specifies the interrupt source to enable. |
|||
* This parameter can be one of the following values: |
|||
* @arg @ref I2C_IT_ERRI Errors interrupt enable |
|||
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable |
|||
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable |
|||
* @arg @ref I2C_IT_NACKI NACK received interrupt enable |
|||
* @arg @ref I2C_IT_ADDRI Address match interrupt enable |
|||
* @arg @ref I2C_IT_RXI RX interrupt enable |
|||
* @arg @ref I2C_IT_TXI TX interrupt enable |
|||
* |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
|||
|
|||
/** @brief Disable the specified I2C interrupt.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @param __INTERRUPT__ specifies the interrupt source to disable. |
|||
* This parameter can be one of the following values: |
|||
* @arg @ref I2C_IT_ERRI Errors interrupt enable |
|||
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable |
|||
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable |
|||
* @arg @ref I2C_IT_NACKI NACK received interrupt enable |
|||
* @arg @ref I2C_IT_ADDRI Address match interrupt enable |
|||
* @arg @ref I2C_IT_RXI RX interrupt enable |
|||
* @arg @ref I2C_IT_TXI TX interrupt enable |
|||
* |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
|||
|
|||
/** @brief Check whether the specified I2C interrupt source is enabled or not.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @param __INTERRUPT__ specifies the I2C interrupt source to check. |
|||
* This parameter can be one of the following values: |
|||
* @arg @ref I2C_IT_ERRI Errors interrupt enable |
|||
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable |
|||
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable |
|||
* @arg @ref I2C_IT_NACKI NACK received interrupt enable |
|||
* @arg @ref I2C_IT_ADDRI Address match interrupt enable |
|||
* @arg @ref I2C_IT_RXI RX interrupt enable |
|||
* @arg @ref I2C_IT_TXI TX interrupt enable |
|||
* |
|||
* @retval The new state of __INTERRUPT__ (SET or RESET). |
|||
*/ |
|||
#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
|||
|
|||
/** @brief Check whether the specified I2C flag is set or not.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @param __FLAG__ specifies the flag to check. |
|||
* This parameter can be one of the following values: |
|||
* @arg @ref I2C_FLAG_TXE Transmit data register empty |
|||
* @arg @ref I2C_FLAG_TXIS Transmit interrupt status |
|||
* @arg @ref I2C_FLAG_RXNE Receive data register not empty |
|||
* @arg @ref I2C_FLAG_ADDR Address matched (slave mode) |
|||
* @arg @ref I2C_FLAG_AF Acknowledge failure received flag |
|||
* @arg @ref I2C_FLAG_STOPF STOP detection flag |
|||
* @arg @ref I2C_FLAG_TC Transfer complete (master mode) |
|||
* @arg @ref I2C_FLAG_TCR Transfer complete reload |
|||
* @arg @ref I2C_FLAG_BERR Bus error |
|||
* @arg @ref I2C_FLAG_ARLO Arbitration lost |
|||
* @arg @ref I2C_FLAG_OVR Overrun/Underrun |
|||
* @arg @ref I2C_FLAG_PECERR PEC error in reception |
|||
* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag |
|||
* @arg @ref I2C_FLAG_ALERT SMBus alert |
|||
* @arg @ref I2C_FLAG_BUSY Bus busy |
|||
* @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) |
|||
* |
|||
* @retval The new state of __FLAG__ (SET or RESET). |
|||
*/ |
|||
#define I2C_FLAG_MASK (0x0001FFFFU) |
|||
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) |
|||
|
|||
/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @param __FLAG__ specifies the flag to clear. |
|||
* This parameter can be any combination of the following values: |
|||
* @arg @ref I2C_FLAG_TXE Transmit data register empty |
|||
* @arg @ref I2C_FLAG_ADDR Address matched (slave mode) |
|||
* @arg @ref I2C_FLAG_AF Acknowledge failure received flag |
|||
* @arg @ref I2C_FLAG_STOPF STOP detection flag |
|||
* @arg @ref I2C_FLAG_BERR Bus error |
|||
* @arg @ref I2C_FLAG_ARLO Arbitration lost |
|||
* @arg @ref I2C_FLAG_OVR Overrun/Underrun |
|||
* @arg @ref I2C_FLAG_PECERR PEC error in reception |
|||
* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag |
|||
* @arg @ref I2C_FLAG_ALERT SMBus alert |
|||
* |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ |
|||
: ((__HANDLE__)->Instance->ICR = (__FLAG__))) |
|||
|
|||
/** @brief Enable the specified I2C peripheral.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
|||
|
|||
/** @brief Disable the specified I2C peripheral.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
|||
|
|||
/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
|
|||
* @param __HANDLE__ specifies the I2C Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Include I2C HAL Extended module */ |
|||
#include "stm32wbxx_hal_i2c_ex.h" |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup I2C_Exported_Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @{ |
|||
*/ |
|||
/* Initialization and de-initialization functions******************************/ |
|||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
|||
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
|||
|
|||
/* Callbacks Register/UnRegister functions ***********************************/ |
|||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
|||
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); |
|||
|
|||
HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); |
|||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
|
|||
* @{ |
|||
*/ |
|||
/* IO operation functions ****************************************************/ |
|||
/******* Blocking mode: Polling */ |
|||
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
|||
|
|||
/******* Non-Blocking mode: Interrupt */ |
|||
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
|||
|
|||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
|||
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
|||
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
|||
|
|||
/******* Non-Blocking mode: DMA */ |
|||
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
|||
|
|||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
|||
* @{ |
|||
*/ |
|||
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
|||
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
|||
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
|||
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
|
|||
* @{ |
|||
*/ |
|||
/* Peripheral State, Mode and Error functions *********************************/ |
|||
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
|||
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
|||
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup I2C_Private_Constants I2C Private Constants
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/** @defgroup I2C_Private_Macro I2C Private Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ |
|||
((MODE) == I2C_ADDRESSINGMODE_10BIT)) |
|||
|
|||
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
|||
((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
|||
|
|||
#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ |
|||
((MASK) == I2C_OA2_MASK01) || \ |
|||
((MASK) == I2C_OA2_MASK02) || \ |
|||
((MASK) == I2C_OA2_MASK03) || \ |
|||
((MASK) == I2C_OA2_MASK04) || \ |
|||
((MASK) == I2C_OA2_MASK05) || \ |
|||
((MASK) == I2C_OA2_MASK06) || \ |
|||
((MASK) == I2C_OA2_MASK07)) |
|||
|
|||
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
|||
((CALL) == I2C_GENERALCALL_ENABLE)) |
|||
|
|||
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
|||
((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
|||
|
|||
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
|||
((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
|||
|
|||
#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ |
|||
((MODE) == I2C_AUTOEND_MODE) || \ |
|||
((MODE) == I2C_SOFTEND_MODE)) |
|||
|
|||
#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ |
|||
((REQUEST) == I2C_GENERATE_START_READ) || \ |
|||
((REQUEST) == I2C_GENERATE_START_WRITE) || \ |
|||
((REQUEST) == I2C_NO_STARTSTOP)) |
|||
|
|||
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
|||
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ |
|||
((REQUEST) == I2C_NEXT_FRAME) || \ |
|||
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
|||
((REQUEST) == I2C_LAST_FRAME) || \ |
|||
((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ |
|||
IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) |
|||
|
|||
#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ |
|||
((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) |
|||
|
|||
#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
|||
|
|||
#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)) |
|||
#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)) |
|||
#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
|||
#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) |
|||
#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) |
|||
|
|||
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) |
|||
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) |
|||
|
|||
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) |
|||
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) |
|||
|
|||
#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
|||
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
|||
|
|||
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) |
|||
#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private Functions ---------------------------------------------------------*/ |
|||
/** @defgroup I2C_Private_Functions I2C Private Functions
|
|||
* @{ |
|||
*/ |
|||
/* Private functions are defined in stm32wbxx_hal_i2c.c file */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
|
|||
#endif /* STM32WBxx_HAL_I2C_H */ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -1,174 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_hal_i2c_ex.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of I2C HAL Extended module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32WBxx_HAL_I2C_EX_H |
|||
#define STM32WBxx_HAL_I2C_EX_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_hal_def.h" |
|||
|
|||
/** @addtogroup STM32WBxx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup I2CEx
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
|
|||
* @{ |
|||
*/ |
|||
#define I2C_ANALOGFILTER_ENABLE 0x00000000U |
|||
#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
|
|||
* @{ |
|||
*/ |
|||
#define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ |
|||
#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ |
|||
#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ |
|||
#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ |
|||
#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ |
|||
#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ |
|||
#if defined(SYSCFG_CFGR1_I2C3_FMP) |
|||
#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ |
|||
#else |
|||
#define I2C_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */ |
|||
#endif |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
/** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup I2CEx_Exported_Functions_Group1 I2C Extended Filter Mode Functions
|
|||
* @{ |
|||
*/ |
|||
/* Peripheral Control functions ************************************************/ |
|||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); |
|||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup I2CEx_Exported_Functions_Group2 I2C Extended WakeUp Mode Functions
|
|||
* @{ |
|||
*/ |
|||
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); |
|||
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup I2CEx_Exported_Functions_Group3 I2C Extended FastModePlus Functions
|
|||
* @{ |
|||
*/ |
|||
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); |
|||
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
|
|||
* @{ |
|||
*/ |
|||
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ |
|||
((FILTER) == I2C_ANALOGFILTER_DISABLE)) |
|||
|
|||
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) |
|||
|
|||
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ |
|||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ |
|||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ |
|||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ |
|||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ |
|||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3)) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private Functions ---------------------------------------------------------*/ |
|||
/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
|
|||
* @{ |
|||
*/ |
|||
/* Private functions are defined in stm32wbxx_hal_i2c_ex.c file */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* STM32WBxx_HAL_I2C_EX_H */ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -1,994 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_hal_pcd.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of PCD HAL module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32WBxx_HAL_PCD_H |
|||
#define STM32WBxx_HAL_PCD_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_ll_usb.h" |
|||
|
|||
#if defined (USB) |
|||
|
|||
/** @addtogroup STM32WBxx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup PCD
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/** @defgroup PCD_Exported_Types PCD Exported Types
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief PCD State structure definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_PCD_STATE_RESET = 0x00, |
|||
HAL_PCD_STATE_READY = 0x01, |
|||
HAL_PCD_STATE_ERROR = 0x02, |
|||
HAL_PCD_STATE_BUSY = 0x03, |
|||
HAL_PCD_STATE_TIMEOUT = 0x04 |
|||
} PCD_StateTypeDef; |
|||
|
|||
/* Device LPM suspend state */ |
|||
typedef enum |
|||
{ |
|||
LPM_L0 = 0x00, /* on */ |
|||
LPM_L1 = 0x01, /* LPM L1 sleep */ |
|||
LPM_L2 = 0x02, /* suspend */ |
|||
LPM_L3 = 0x03, /* off */ |
|||
} PCD_LPM_StateTypeDef; |
|||
|
|||
typedef enum |
|||
{ |
|||
PCD_LPM_L0_ACTIVE = 0x00, /* on */ |
|||
PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ |
|||
} PCD_LPM_MsgTypeDef; |
|||
|
|||
typedef enum |
|||
{ |
|||
PCD_BCD_ERROR = 0xFF, |
|||
PCD_BCD_CONTACT_DETECTION = 0xFE, |
|||
PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, |
|||
PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, |
|||
PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, |
|||
PCD_BCD_DISCOVERY_COMPLETED = 0x00, |
|||
|
|||
} PCD_BCD_MsgTypeDef; |
|||
|
|||
|
|||
|
|||
|
|||
|
|||
typedef USB_TypeDef PCD_TypeDef; |
|||
typedef USB_CfgTypeDef PCD_InitTypeDef; |
|||
typedef USB_EPTypeDef PCD_EPTypeDef; |
|||
|
|||
|
|||
/**
|
|||
* @brief PCD Handle Structure definition |
|||
*/ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
typedef struct __PCD_HandleTypeDef |
|||
#else |
|||
typedef struct |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
{ |
|||
PCD_TypeDef *Instance; /*!< Register base address */ |
|||
PCD_InitTypeDef Init; /*!< PCD required parameters */ |
|||
__IO uint8_t USB_Address; /*!< USB Address */ |
|||
PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
|||
PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
|||
HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
|||
__IO PCD_StateTypeDef State; /*!< PCD communication state */ |
|||
__IO uint32_t ErrorCode; /*!< PCD Error code */ |
|||
uint32_t Setup[12]; /*!< Setup packet buffer */ |
|||
PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
|||
uint32_t BESL; |
|||
|
|||
|
|||
uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
|
|||
This parameter can be set to ENABLE or DISABLE */ |
|||
|
|||
uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
|
|||
This parameter can be set to ENABLE or DISABLE */ |
|||
void *pData; /*!< Pointer to upper stack Handler */ |
|||
|
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ |
|||
void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ |
|||
void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ |
|||
void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ |
|||
void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ |
|||
void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ |
|||
void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ |
|||
|
|||
void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ |
|||
void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ |
|||
void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ |
|||
void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ |
|||
void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ |
|||
void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ |
|||
|
|||
void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ |
|||
void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
} PCD_HandleTypeDef; |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Include PCD HAL Extended module */ |
|||
#include "stm32wbxx_hal_pcd_ex.h" |
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/** @defgroup PCD_Exported_Constants PCD Exported Constants
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup PCD_Speed PCD Speed
|
|||
* @{ |
|||
*/ |
|||
#define PCD_SPEED_FULL USBD_FS_SPEED |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCD_PHY_Module PCD PHY Module
|
|||
* @{ |
|||
*/ |
|||
#define PCD_PHY_ULPI 1U |
|||
#define PCD_PHY_EMBEDDED 2U |
|||
#define PCD_PHY_UTMI 3U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCD_Error_Code_definition PCD Error Code definition
|
|||
* @brief PCD Error Code definition |
|||
* @{ |
|||
*/ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
#define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported macros -----------------------------------------------------------*/ |
|||
/** @defgroup PCD_Exported_Macros PCD Exported Macros
|
|||
* @brief macros to handle interrupts and specific clock configurations |
|||
* @{ |
|||
*/ |
|||
|
|||
|
|||
#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
|||
#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
|||
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
|||
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))) |
|||
|
|||
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE |
|||
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) |
|||
|
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Initialization/de-initialization functions ********************************/ |
|||
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @{ |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
|||
|
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
|
|||
* @brief HAL USB OTG PCD Callback ID enumeration definition |
|||
* @{ |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ |
|||
HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ |
|||
HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ |
|||
HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ |
|||
HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ |
|||
HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ |
|||
HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ |
|||
|
|||
HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ |
|||
HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ |
|||
|
|||
} HAL_PCD_CallbackIDTypeDef; |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
|
|||
* @brief HAL USB OTG PCD Callback pointer definition |
|||
* @{ |
|||
*/ |
|||
|
|||
typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ |
|||
typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ |
|||
typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ |
|||
typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ |
|||
typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ |
|||
typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ |
|||
typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, |
|||
HAL_PCD_CallbackIDTypeDef CallbackID, |
|||
pPCD_CallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, |
|||
HAL_PCD_CallbackIDTypeDef CallbackID); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, |
|||
pPCD_DataOutStageCallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, |
|||
pPCD_DataInStageCallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, |
|||
pPCD_IsoOutIncpltCallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, |
|||
pPCD_IsoInIncpltCallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, |
|||
pPCD_BcdCallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, |
|||
pPCD_LpmCallbackTypeDef pCallback); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* I/O operation functions ***************************************************/ |
|||
/* Non-Blocking mode: Interrupt */ |
|||
/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
|
|||
* @{ |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
|||
|
|||
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
|||
|
|||
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|||
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|||
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|||
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Peripheral Control functions **********************************************/ |
|||
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
|
|||
* @{ |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
|||
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
|||
uint16_t ep_mps, uint8_t ep_type); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|||
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
|||
uint8_t *pBuf, uint32_t len); |
|||
|
|||
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
|||
uint8_t *pBuf, uint32_t len); |
|||
|
|||
|
|||
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|||
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|||
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|||
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
|||
|
|||
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Peripheral State functions ************************************************/ |
|||
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
|
|||
* @{ |
|||
*/ |
|||
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup PCD_Private_Constants PCD Private Constants
|
|||
* @{ |
|||
*/ |
|||
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
|
|||
* @{ |
|||
*/ |
|||
|
|||
|
|||
#define USB_WAKEUP_EXTI_LINE (0x1U << 28) /*!< USB FS EXTI Line WakeUp Interrupt */ |
|||
|
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
|
|||
* @{ |
|||
*/ |
|||
#define PCD_EP0MPS_64 EP_MPS_64 |
|||
#define PCD_EP0MPS_32 EP_MPS_32 |
|||
#define PCD_EP0MPS_16 EP_MPS_16 |
|||
#define PCD_EP0MPS_08 EP_MPS_8 |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCD_ENDP PCD ENDP
|
|||
* @{ |
|||
*/ |
|||
#define PCD_ENDP0 0U |
|||
#define PCD_ENDP1 1U |
|||
#define PCD_ENDP2 2U |
|||
#define PCD_ENDP3 3U |
|||
#define PCD_ENDP4 4U |
|||
#define PCD_ENDP5 5U |
|||
#define PCD_ENDP6 6U |
|||
#define PCD_ENDP7 7U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
|
|||
* @{ |
|||
*/ |
|||
#define PCD_SNG_BUF 0U |
|||
#define PCD_DBL_BUF 1U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/** @defgroup PCD_Private_Macros PCD Private Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
/******************** Bit definition for USB_COUNTn_RX register *************/ |
|||
#define USB_CNTRX_NBLK_MSK (0x1FU << 10) |
|||
#define USB_CNTRX_BLSIZE (0x1U << 15) |
|||
|
|||
/* SetENDPOINT */ |
|||
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) |
|||
|
|||
/* GetENDPOINT */ |
|||
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) |
|||
|
|||
/* ENDPOINT transfer */ |
|||
#define USB_EP0StartXfer USB_EPStartXfer |
|||
|
|||
/**
|
|||
* @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wType Endpoint Type. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) |
|||
|
|||
/**
|
|||
* @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval Endpoint Type |
|||
*/ |
|||
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
|||
|
|||
/**
|
|||
* @brief free buffer used from the application realizing it to the line |
|||
* toggles bit SW_BUF in the double buffered endpoint register |
|||
* @param USBx USB device. |
|||
* @param bEpNum, bDir |
|||
* @retval None |
|||
*/ |
|||
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ |
|||
do { \ |
|||
if ((bDir) == 0U) \ |
|||
{ \ |
|||
/* OUT double buffered endpoint */ \ |
|||
PCD_TX_DTOG((USBx), (bEpNum)); \ |
|||
} \ |
|||
else if ((bDir) == 1U) \ |
|||
{ \ |
|||
/* IN double buffered endpoint */ \ |
|||
PCD_RX_DTOG((USBx), (bEpNum)); \ |
|||
} \ |
|||
} while(0) |
|||
|
|||
/**
|
|||
* @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wState new state |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ |
|||
/* toggle first bit ? */ \ |
|||
if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPTX_DTOG1; \ |
|||
} \ |
|||
/* toggle second bit ? */ \ |
|||
if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPTX_DTOG2; \ |
|||
} \ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|||
} while(0) /* PCD_SET_EP_TX_STATUS */ |
|||
|
|||
/**
|
|||
* @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wState new state |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ |
|||
/* toggle first bit ? */ \ |
|||
if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPRX_DTOG1; \ |
|||
} \ |
|||
/* toggle second bit ? */ \ |
|||
if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPRX_DTOG2; \ |
|||
} \ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|||
} while(0) /* PCD_SET_EP_RX_STATUS */ |
|||
|
|||
/**
|
|||
* @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wStaterx new state. |
|||
* @param wStatetx new state. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ |
|||
/* toggle first bit ? */ \ |
|||
if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPRX_DTOG1; \ |
|||
} \ |
|||
/* toggle second bit ? */ \ |
|||
if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPRX_DTOG2; \ |
|||
} \ |
|||
/* toggle first bit ? */ \ |
|||
if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPTX_DTOG1; \ |
|||
} \ |
|||
/* toggle second bit ? */ \ |
|||
if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ |
|||
{ \ |
|||
_wRegVal ^= USB_EPTX_DTOG2; \ |
|||
} \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|||
} while(0) /* PCD_SET_EP_TXRX_STATUS */ |
|||
|
|||
/**
|
|||
* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
|||
* /STAT_RX[1:0]) |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval status |
|||
*/ |
|||
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
|||
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
|||
|
|||
/**
|
|||
* @brief sets directly the VALID tx/rx-status into the endpoint register |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
|||
#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
|||
|
|||
/**
|
|||
* @brief checks stall condition in an endpoint. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval TRUE = endpoint in stall condition. |
|||
*/ |
|||
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) |
|||
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) |
|||
|
|||
/**
|
|||
* @brief set & clear EP_KIND bit. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_KIND(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ |
|||
} while(0) /* PCD_SET_EP_KIND */ |
|||
|
|||
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|||
} while(0) /* PCD_CLEAR_EP_KIND */ |
|||
|
|||
/**
|
|||
* @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
|||
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
|||
|
|||
/**
|
|||
* @brief Sets/clears directly EP_KIND bit in the endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
|||
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
|||
|
|||
/**
|
|||
* @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ |
|||
} while(0) /* PCD_CLEAR_RX_EP_CTR */ |
|||
|
|||
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ |
|||
} while(0) /* PCD_CLEAR_TX_EP_CTR */ |
|||
|
|||
/**
|
|||
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_RX_DTOG(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wEPVal; \ |
|||
\ |
|||
_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ |
|||
} while(0) /* PCD_RX_DTOG */ |
|||
|
|||
#define PCD_TX_DTOG(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wEPVal; \ |
|||
\ |
|||
_wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ |
|||
} while(0) /* PCD_TX_DTOG */ |
|||
/**
|
|||
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
|||
\ |
|||
if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ |
|||
{ \ |
|||
PCD_RX_DTOG((USBx), (bEpNum)); \ |
|||
} \ |
|||
} while(0) /* PCD_CLEAR_RX_DTOG */ |
|||
|
|||
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
|||
\ |
|||
if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ |
|||
{ \ |
|||
PCD_TX_DTOG((USBx), (bEpNum)); \ |
|||
} \ |
|||
} while(0) /* PCD_CLEAR_TX_DTOG */ |
|||
|
|||
/**
|
|||
* @brief Sets address in an endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param bAddr Address. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ |
|||
do { \ |
|||
uint16_t _wRegVal; \ |
|||
\ |
|||
_wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ |
|||
\ |
|||
PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|||
} while(0) /* PCD_SET_EP_ADDRESS */ |
|||
|
|||
/**
|
|||
* @brief Gets address in an endpoint register. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
|||
|
|||
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
|||
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
|||
|
|||
/**
|
|||
* @brief sets address of the tx/rx buffer. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wAddr address to be set (must be word aligned). |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ |
|||
do { \ |
|||
__IO uint16_t *_wRegVal; \ |
|||
uint32_t _wRegBase = (uint32_t)USBx; \ |
|||
\ |
|||
_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|||
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ |
|||
*_wRegVal = ((wAddr) >> 1) << 1; \ |
|||
} while(0) /* PCD_SET_EP_TX_ADDRESS */ |
|||
|
|||
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ |
|||
do { \ |
|||
__IO uint16_t *_wRegVal; \ |
|||
uint32_t _wRegBase = (uint32_t)USBx; \ |
|||
\ |
|||
_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|||
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ |
|||
*_wRegVal = ((wAddr) >> 1) << 1; \ |
|||
} while(0) /* PCD_SET_EP_RX_ADDRESS */ |
|||
|
|||
/**
|
|||
* @brief Gets address of the tx/rx buffer. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval address of the buffer. |
|||
*/ |
|||
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
|||
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
|||
|
|||
/**
|
|||
* @brief Sets counter of rx buffer with no. of blocks. |
|||
* @param pdwReg Register pointer |
|||
* @param wCount Counter. |
|||
* @param wNBlocks no. of Blocks. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ |
|||
do { \ |
|||
(wNBlocks) = (wCount) >> 5; \ |
|||
if (((wCount) & 0x1fU) == 0U) \ |
|||
{ \ |
|||
(wNBlocks)--; \ |
|||
} \ |
|||
*(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ |
|||
} while(0) /* PCD_CALC_BLK32 */ |
|||
|
|||
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ |
|||
do { \ |
|||
(wNBlocks) = (wCount) >> 1; \ |
|||
if (((wCount) & 0x1U) != 0U) \ |
|||
{ \ |
|||
(wNBlocks)++; \ |
|||
} \ |
|||
*(pdwReg) = (uint16_t)((wNBlocks) << 10); \ |
|||
} while(0) /* PCD_CALC_BLK2 */ |
|||
|
|||
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ |
|||
do { \ |
|||
uint32_t wNBlocks; \ |
|||
if ((wCount) == 0U) \ |
|||
{ \ |
|||
*(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ |
|||
*(pdwReg) |= USB_CNTRX_BLSIZE; \ |
|||
} \ |
|||
else if((wCount) <= 62U) \ |
|||
{ \ |
|||
PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ |
|||
} \ |
|||
else \ |
|||
{ \ |
|||
PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ |
|||
} \ |
|||
} while(0) /* PCD_SET_EP_CNT_RX_REG */ |
|||
|
|||
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ |
|||
do { \ |
|||
uint32_t _wRegBase = (uint32_t)(USBx); \ |
|||
__IO uint16_t *pdwReg; \ |
|||
\ |
|||
_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|||
pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
|||
PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ |
|||
} while(0) |
|||
|
|||
/**
|
|||
* @brief sets counter for the tx/rx buffer. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wCount Counter value. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ |
|||
do { \ |
|||
uint32_t _wRegBase = (uint32_t)(USBx); \ |
|||
__IO uint16_t *_wRegVal; \ |
|||
\ |
|||
_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|||
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
|||
*_wRegVal = (uint16_t)(wCount); \ |
|||
} while(0) |
|||
|
|||
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ |
|||
do { \ |
|||
uint32_t _wRegBase = (uint32_t)(USBx); \ |
|||
__IO uint16_t *_wRegVal; \ |
|||
\ |
|||
_wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|||
_wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
|||
PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ |
|||
} while(0) |
|||
|
|||
/**
|
|||
* @brief gets counter of the tx buffer. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval Counter value |
|||
*/ |
|||
#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) |
|||
#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) |
|||
|
|||
/**
|
|||
* @brief Sets buffer 0/1 address in a double buffer endpoint. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wBuf0Addr buffer 0 address. |
|||
* @retval Counter value |
|||
*/ |
|||
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ |
|||
do { \ |
|||
PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ |
|||
} while(0) /* PCD_SET_EP_DBUF0_ADDR */ |
|||
|
|||
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ |
|||
do { \ |
|||
PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ |
|||
} while(0) /* PCD_SET_EP_DBUF1_ADDR */ |
|||
|
|||
/**
|
|||
* @brief Sets addresses in a double buffer endpoint. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param wBuf0Addr: buffer 0 address. |
|||
* @param wBuf1Addr = buffer 1 address. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ |
|||
do { \ |
|||
PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ |
|||
PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ |
|||
} while(0) /* PCD_SET_EP_DBUF_ADDR */ |
|||
|
|||
/**
|
|||
* @brief Gets buffer 0/1 address of a double buffer endpoint. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
|||
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
|||
|
|||
/**
|
|||
* @brief Gets buffer 0/1 address of a double buffer endpoint. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @param bDir endpoint dir EP_DBUF_OUT = OUT |
|||
* EP_DBUF_IN = IN |
|||
* @param wCount: Counter value |
|||
* @retval None |
|||
*/ |
|||
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ |
|||
do { \ |
|||
if ((bDir) == 0U) \ |
|||
/* OUT endpoint */ \ |
|||
{ \ |
|||
PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ |
|||
} \ |
|||
else \ |
|||
{ \ |
|||
if ((bDir) == 1U) \ |
|||
{ \ |
|||
/* IN endpoint */ \ |
|||
PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ |
|||
} \ |
|||
} \ |
|||
} while(0) /* SetEPDblBuf0Count*/ |
|||
|
|||
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ |
|||
do { \ |
|||
uint32_t _wBase = (uint32_t)(USBx); \ |
|||
__IO uint16_t *_wEPRegVal; \ |
|||
\ |
|||
if ((bDir) == 0U) \ |
|||
{ \ |
|||
/* OUT endpoint */ \ |
|||
PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ |
|||
} \ |
|||
else \ |
|||
{ \ |
|||
if ((bDir) == 1U) \ |
|||
{ \ |
|||
/* IN endpoint */ \ |
|||
_wBase += (uint32_t)(USBx)->BTABLE; \ |
|||
_wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
|||
*_wEPRegVal = (uint16_t)(wCount); \ |
|||
} \ |
|||
} \ |
|||
} while(0) /* SetEPDblBuf1Count */ |
|||
|
|||
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ |
|||
do { \ |
|||
PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
|||
PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
|||
} while(0) /* PCD_SET_EP_DBUF_CNT */ |
|||
|
|||
/**
|
|||
* @brief Gets buffer 0/1 rx/tx counter for double buffering. |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param bEpNum Endpoint Number. |
|||
* @retval None |
|||
*/ |
|||
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
|||
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
|||
|
|||
|
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
#endif /* defined (USB) */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* STM32WBxx_HAL_PCD_H */ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -1,91 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_hal_pcd_ex.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of PCD HAL Extension module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32WBxx_HAL_PCD_EX_H |
|||
#define STM32WBxx_HAL_PCD_EX_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_hal_def.h" |
|||
|
|||
#if defined (USB) |
|||
/** @addtogroup STM32WBxx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup PCDEx
|
|||
* @{ |
|||
*/ |
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/* Exported macros -----------------------------------------------------------*/ |
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
|
|||
* @{ |
|||
*/ |
|||
/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
|
|||
|
|||
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, |
|||
uint16_t ep_kind, uint32_t pmaadress); |
|||
|
|||
|
|||
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); |
|||
|
|||
|
|||
HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); |
|||
HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); |
|||
void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); |
|||
|
|||
void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); |
|||
void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
#endif /* defined (USB) */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
|
|||
#endif /* STM32WBxx_HAL_PCD_EX_H */ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -1,237 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_ll_usb.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of USB Low Layer HAL module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32WBxx_LL_USB_H |
|||
#define STM32WBxx_LL_USB_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_hal_def.h" |
|||
|
|||
#if defined (USB) |
|||
/** @addtogroup STM32WBxx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup USB_LL
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
|
|||
/**
|
|||
* @brief USB Mode definition |
|||
*/ |
|||
|
|||
|
|||
|
|||
typedef enum |
|||
{ |
|||
USB_DEVICE_MODE = 0 |
|||
} USB_ModeTypeDef; |
|||
|
|||
/**
|
|||
* @brief USB Initialization Structure definition |
|||
*/ |
|||
typedef struct |
|||
{ |
|||
uint32_t dev_endpoints; /*!< Device Endpoints number.
|
|||
This parameter depends on the used USB core. |
|||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
|||
|
|||
uint32_t speed; /*!< USB Core speed.
|
|||
This parameter can be any value of @ref USB_Core_Speed */ |
|||
|
|||
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ |
|||
|
|||
uint32_t phy_itface; /*!< Select the used PHY interface.
|
|||
This parameter can be any value of @ref USB_Core_PHY */ |
|||
|
|||
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ |
|||
|
|||
uint32_t low_power_enable; /*!< Enable or disable Low Power mode */ |
|||
|
|||
uint32_t lpm_enable; /*!< Enable or disable Battery charging. */ |
|||
|
|||
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ |
|||
} USB_CfgTypeDef; |
|||
|
|||
typedef struct |
|||
{ |
|||
uint8_t num; /*!< Endpoint number
|
|||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
|||
|
|||
uint8_t is_in; /*!< Endpoint direction
|
|||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
|||
|
|||
uint8_t is_stall; /*!< Endpoint stall condition
|
|||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
|||
|
|||
uint8_t type; /*!< Endpoint type
|
|||
This parameter can be any value of @ref USB_EP_Type */ |
|||
|
|||
uint8_t data_pid_start; /*!< Initial data PID
|
|||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
|||
|
|||
uint16_t pmaadress; /*!< PMA Address
|
|||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
|||
|
|||
uint16_t pmaaddr0; /*!< PMA Address0
|
|||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
|||
|
|||
uint16_t pmaaddr1; /*!< PMA Address1
|
|||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
|||
|
|||
uint8_t doublebuffer; /*!< Double buffer enable
|
|||
This parameter can be 0 or 1 */ |
|||
|
|||
uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used
|
|||
only by USB OTG FS peripheral |
|||
This parameter is added to ensure compatibility across USB peripherals */ |
|||
|
|||
uint32_t maxpacket; /*!< Endpoint Max packet size
|
|||
This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
|||
|
|||
uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
|||
|
|||
uint32_t xfer_len; /*!< Current transfer length */ |
|||
|
|||
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
|||
|
|||
uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */ |
|||
|
|||
uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */ |
|||
|
|||
} USB_EPTypeDef; |
|||
|
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
|
|||
/** @defgroup PCD_Exported_Constants PCD Exported Constants
|
|||
* @{ |
|||
*/ |
|||
|
|||
|
|||
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
|
|||
* @{ |
|||
*/ |
|||
#define EP_MPS_64 0U |
|||
#define EP_MPS_32 1U |
|||
#define EP_MPS_16 2U |
|||
#define EP_MPS_8 3U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup USB_LL_EP_Type USB Low Layer EP Type
|
|||
* @{ |
|||
*/ |
|||
#define EP_TYPE_CTRL 0U |
|||
#define EP_TYPE_ISOC 1U |
|||
#define EP_TYPE_BULK 2U |
|||
#define EP_TYPE_INTR 3U |
|||
#define EP_TYPE_MSK 3U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup USB_LL Device Speed
|
|||
* @{ |
|||
*/ |
|||
#define USBD_FS_SPEED 2U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#define BTABLE_ADDRESS 0x000U |
|||
#define PMA_ACCESS 1U |
|||
|
|||
#define EP_ADDR_MSK 0x7U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
|
|||
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); |
|||
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); |
|||
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); |
|||
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); |
|||
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); |
|||
|
|||
#if defined (HAL_PCD_MODULE_ENABLED) |
|||
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); |
|||
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); |
|||
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); |
|||
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); |
|||
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); |
|||
#endif |
|||
|
|||
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); |
|||
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); |
|||
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx); |
|||
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); |
|||
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx); |
|||
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); |
|||
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); |
|||
|
|||
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, |
|||
uint16_t wPMABufAddr, uint16_t wNBytes); |
|||
|
|||
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, |
|||
uint16_t wPMABufAddr, uint16_t wNBytes); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
#endif /* defined (USB) */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
|
|||
#endif /* STM32WBxx_LL_USB_H */ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
File diff suppressed because it is too large
@ -1,325 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_hal_i2c_ex.c |
|||
* @author MCD Application Team |
|||
* @brief I2C Extended HAL module driver. |
|||
* This file provides firmware functions to manage the following |
|||
* functionalities of I2C Extended peripheral: |
|||
* + Extended features functions |
|||
* |
|||
@verbatim |
|||
============================================================================== |
|||
##### I2C peripheral Extended features ##### |
|||
============================================================================== |
|||
|
|||
[..] Comparing to other previous devices, the I2C interface for STM32WBxx |
|||
devices contains the following additional features |
|||
|
|||
(+) Possibility to disable or enable Analog Noise Filter |
|||
(+) Use of a configured Digital Noise Filter |
|||
(+) Disable or enable wakeup from Stop mode(s) |
|||
(+) Disable or enable Fast Mode Plus |
|||
|
|||
##### How to use this driver ##### |
|||
============================================================================== |
|||
[..] This driver provides functions to configure Noise Filter and Wake Up Feature |
|||
(#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() |
|||
(#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() |
|||
(#) Configure the enable or disable of I2C Wake Up Mode using the functions : |
|||
(++) HAL_I2CEx_EnableWakeUp() |
|||
(++) HAL_I2CEx_DisableWakeUp() |
|||
(#) Configure the enable or disable of fast mode plus driving capability using the functions : |
|||
(++) HAL_I2CEx_EnableFastModePlus() |
|||
(++) HAL_I2CEx_DisableFastModePlus() |
|||
@endverbatim |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_hal.h" |
|||
|
|||
/** @addtogroup STM32WBxx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup I2CEx I2CEx
|
|||
* @brief I2C Extended HAL module driver |
|||
* @{ |
|||
*/ |
|||
|
|||
#ifdef HAL_I2C_MODULE_ENABLED |
|||
|
|||
/* Private typedef -----------------------------------------------------------*/ |
|||
/* Private define ------------------------------------------------------------*/ |
|||
/* Private macro -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private function prototypes -----------------------------------------------*/ |
|||
/* Private functions ---------------------------------------------------------*/ |
|||
|
|||
/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
|
|||
* @brief Extended features functions |
|||
* |
|||
@verbatim |
|||
=============================================================================== |
|||
##### Extended features functions ##### |
|||
=============================================================================== |
|||
[..] This section provides functions allowing to: |
|||
(+) Configure Noise Filters |
|||
(+) Configure Wake Up Feature |
|||
(+) Configure Fast Mode Plus |
|||
|
|||
@endverbatim |
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief Configure I2C Analog noise filter. |
|||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|||
* the configuration information for the specified I2Cx peripheral. |
|||
* @param AnalogFilter New state of the Analog filter. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) |
|||
{ |
|||
/* Check the parameters */ |
|||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
|||
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); |
|||
|
|||
if (hi2c->State == HAL_I2C_STATE_READY) |
|||
{ |
|||
/* Process Locked */ |
|||
__HAL_LOCK(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_BUSY; |
|||
|
|||
/* Disable the selected I2C peripheral */ |
|||
__HAL_I2C_DISABLE(hi2c); |
|||
|
|||
/* Reset I2Cx ANOFF bit */ |
|||
hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); |
|||
|
|||
/* Set analog filter bit*/ |
|||
hi2c->Instance->CR1 |= AnalogFilter; |
|||
|
|||
__HAL_I2C_ENABLE(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_READY; |
|||
|
|||
/* Process Unlocked */ |
|||
__HAL_UNLOCK(hi2c); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
else |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* @brief Configure I2C Digital noise filter. |
|||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|||
* the configuration information for the specified I2Cx peripheral. |
|||
* @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) |
|||
{ |
|||
uint32_t tmpreg; |
|||
|
|||
/* Check the parameters */ |
|||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); |
|||
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); |
|||
|
|||
if (hi2c->State == HAL_I2C_STATE_READY) |
|||
{ |
|||
/* Process Locked */ |
|||
__HAL_LOCK(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_BUSY; |
|||
|
|||
/* Disable the selected I2C peripheral */ |
|||
__HAL_I2C_DISABLE(hi2c); |
|||
|
|||
/* Get the old register value */ |
|||
tmpreg = hi2c->Instance->CR1; |
|||
|
|||
/* Reset I2Cx DNF bits [11:8] */ |
|||
tmpreg &= ~(I2C_CR1_DNF); |
|||
|
|||
/* Set I2Cx DNF coefficient */ |
|||
tmpreg |= DigitalFilter << 8U; |
|||
|
|||
/* Store the new register value */ |
|||
hi2c->Instance->CR1 = tmpreg; |
|||
|
|||
__HAL_I2C_ENABLE(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_READY; |
|||
|
|||
/* Process Unlocked */ |
|||
__HAL_UNLOCK(hi2c); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
else |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* @brief Enable I2C wakeup from Stop mode(s). |
|||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|||
* the configuration information for the specified I2Cx peripheral. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) |
|||
{ |
|||
/* Check the parameters */ |
|||
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); |
|||
|
|||
if (hi2c->State == HAL_I2C_STATE_READY) |
|||
{ |
|||
/* Process Locked */ |
|||
__HAL_LOCK(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_BUSY; |
|||
|
|||
/* Disable the selected I2C peripheral */ |
|||
__HAL_I2C_DISABLE(hi2c); |
|||
|
|||
/* Enable wakeup from stop mode */ |
|||
hi2c->Instance->CR1 |= I2C_CR1_WUPEN; |
|||
|
|||
__HAL_I2C_ENABLE(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_READY; |
|||
|
|||
/* Process Unlocked */ |
|||
__HAL_UNLOCK(hi2c); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
else |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* @brief Disable I2C wakeup from Stop mode(s). |
|||
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|||
* the configuration information for the specified I2Cx peripheral. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) |
|||
{ |
|||
/* Check the parameters */ |
|||
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); |
|||
|
|||
if (hi2c->State == HAL_I2C_STATE_READY) |
|||
{ |
|||
/* Process Locked */ |
|||
__HAL_LOCK(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_BUSY; |
|||
|
|||
/* Disable the selected I2C peripheral */ |
|||
__HAL_I2C_DISABLE(hi2c); |
|||
|
|||
/* Enable wakeup from stop mode */ |
|||
hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); |
|||
|
|||
__HAL_I2C_ENABLE(hi2c); |
|||
|
|||
hi2c->State = HAL_I2C_STATE_READY; |
|||
|
|||
/* Process Unlocked */ |
|||
__HAL_UNLOCK(hi2c); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
else |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* @brief Enable the I2C fast mode plus driving capability. |
|||
* @param ConfigFastModePlus Selects the pin. |
|||
* This parameter can be one of the @ref I2CEx_FastModePlus values |
|||
* @note For I2C1, fast mode plus driving capability can be enabled on all selected |
|||
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently |
|||
* on each one of the following pins PB6, PB7, PB8 and PB9. |
|||
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability |
|||
* can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. |
|||
* @note For all I2C3 pins fast mode plus driving capability can be enabled |
|||
* only by using I2C_FASTMODEPLUS_I2C3 parameter. |
|||
* @retval None |
|||
*/ |
|||
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) |
|||
{ |
|||
/* Check the parameter */ |
|||
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); |
|||
|
|||
/* Enable fast mode plus driving capability for selected pin */ |
|||
SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); |
|||
} |
|||
|
|||
/**
|
|||
* @brief Disable the I2C fast mode plus driving capability. |
|||
* @param ConfigFastModePlus Selects the pin. |
|||
* This parameter can be one of the @ref I2CEx_FastModePlus values |
|||
* @note For I2C1, fast mode plus driving capability can be disabled on all selected |
|||
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently |
|||
* on each one of the following pins PB6, PB7, PB8 and PB9. |
|||
* @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability |
|||
* can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. |
|||
* @note For all I2C3 pins fast mode plus driving capability can be disabled |
|||
* only by using I2C_FASTMODEPLUS_I2C3 parameter. |
|||
* @retval None |
|||
*/ |
|||
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) |
|||
{ |
|||
/* Check the parameter */ |
|||
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); |
|||
|
|||
/* Disable fast mode plus driving capability for selected pin */ |
|||
CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); |
|||
} |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* HAL_I2C_MODULE_ENABLED */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
File diff suppressed because it is too large
@ -1,336 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_hal_pcd_ex.c |
|||
* @author MCD Application Team |
|||
* @brief PCD Extended HAL module driver. |
|||
* This file provides firmware functions to manage the following |
|||
* functionalities of the USB Peripheral Controller: |
|||
* + Extended features functions |
|||
* |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_hal.h" |
|||
|
|||
/** @addtogroup STM32WBxx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup PCDEx PCDEx
|
|||
* @brief PCD Extended HAL module driver |
|||
* @{ |
|||
*/ |
|||
|
|||
#ifdef HAL_PCD_MODULE_ENABLED |
|||
|
|||
#if defined (USB) |
|||
/* Private types -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/* Private functions ---------------------------------------------------------*/ |
|||
/* Exported functions --------------------------------------------------------*/ |
|||
|
|||
/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
|
|||
* @brief PCDEx control functions |
|||
* |
|||
@verbatim |
|||
=============================================================================== |
|||
##### Extended features functions ##### |
|||
=============================================================================== |
|||
[..] This section provides functions allowing to: |
|||
(+) Update FIFO configuration |
|||
|
|||
@endverbatim |
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief Configure PMA for EP |
|||
* @param hpcd Device instance |
|||
* @param ep_addr endpoint address |
|||
* @param ep_kind endpoint Kind |
|||
* USB_SNG_BUF: Single Buffer used |
|||
* USB_DBL_BUF: Double Buffer used |
|||
* @param pmaadress: EP address in The PMA: In case of single buffer endpoint |
|||
* this parameter is 16-bit value providing the address |
|||
* in PMA allocated to endpoint. |
|||
* In case of double buffer endpoint this parameter |
|||
* is a 32-bit value providing the endpoint buffer 0 address |
|||
* in the LSB part of 32-bit value and endpoint buffer 1 address |
|||
* in the MSB part of 32-bit value. |
|||
* @retval HAL status |
|||
*/ |
|||
|
|||
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, |
|||
uint16_t ep_kind, uint32_t pmaadress) |
|||
{ |
|||
PCD_EPTypeDef *ep; |
|||
|
|||
/* initialize ep structure*/ |
|||
if ((0x80U & ep_addr) == 0x80U) |
|||
{ |
|||
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; |
|||
} |
|||
else |
|||
{ |
|||
ep = &hpcd->OUT_ep[ep_addr]; |
|||
} |
|||
|
|||
/* Here we check if the endpoint is single or double Buffer*/ |
|||
if (ep_kind == PCD_SNG_BUF) |
|||
{ |
|||
/* Single Buffer */ |
|||
ep->doublebuffer = 0U; |
|||
/* Configure the PMA */ |
|||
ep->pmaadress = (uint16_t)pmaadress; |
|||
} |
|||
else /* USB_DBL_BUF */ |
|||
{ |
|||
/* Double Buffer Endpoint */ |
|||
ep->doublebuffer = 1U; |
|||
/* Configure the PMA */ |
|||
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); |
|||
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); |
|||
} |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Activate BatteryCharging feature. |
|||
* @param hpcd PCD handle |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) |
|||
{ |
|||
USB_TypeDef *USBx = hpcd->Instance; |
|||
hpcd->battery_charging_active = 1U; |
|||
|
|||
/* Enable BCD feature */ |
|||
USBx->BCDR |= USB_BCDR_BCDEN; |
|||
|
|||
/* Enable DCD : Data Contact Detect */ |
|||
USBx->BCDR &= ~(USB_BCDR_PDEN); |
|||
USBx->BCDR &= ~(USB_BCDR_SDEN); |
|||
USBx->BCDR |= USB_BCDR_DCDEN; |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Deactivate BatteryCharging feature. |
|||
* @param hpcd PCD handle |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) |
|||
{ |
|||
USB_TypeDef *USBx = hpcd->Instance; |
|||
hpcd->battery_charging_active = 0U; |
|||
|
|||
/* Disable BCD feature */ |
|||
USBx->BCDR &= ~(USB_BCDR_BCDEN); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Handle BatteryCharging Process. |
|||
* @param hpcd PCD handle |
|||
* @retval HAL status |
|||
*/ |
|||
void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) |
|||
{ |
|||
USB_TypeDef *USBx = hpcd->Instance; |
|||
uint32_t tickstart = HAL_GetTick(); |
|||
|
|||
/* Wait Detect flag or a timeout is happen*/ |
|||
while ((USBx->BCDR & USB_BCDR_DCDET) == 0U) |
|||
{ |
|||
/* Check for the Timeout */ |
|||
if ((HAL_GetTick() - tickstart) > 1000U) |
|||
{ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); |
|||
#else |
|||
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
|
|||
return; |
|||
} |
|||
} |
|||
|
|||
HAL_Delay(200U); |
|||
|
|||
/* Data Pin Contact ? Check Detect flag */ |
|||
if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) |
|||
{ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); |
|||
#else |
|||
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
} |
|||
/* Primary detection: checks if connected to Standard Downstream Port
|
|||
(without charging capability) */ |
|||
USBx->BCDR &= ~(USB_BCDR_DCDEN); |
|||
HAL_Delay(50U); |
|||
USBx->BCDR |= (USB_BCDR_PDEN); |
|||
HAL_Delay(50U); |
|||
|
|||
/* If Charger detect ? */ |
|||
if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) |
|||
{ |
|||
/* Start secondary detection to check connection to Charging Downstream
|
|||
Port or Dedicated Charging Port */ |
|||
USBx->BCDR &= ~(USB_BCDR_PDEN); |
|||
HAL_Delay(50U); |
|||
USBx->BCDR |= (USB_BCDR_SDEN); |
|||
HAL_Delay(50U); |
|||
|
|||
/* If CDP ? */ |
|||
if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) |
|||
{ |
|||
/* Dedicated Downstream Port DCP */ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); |
|||
#else |
|||
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
} |
|||
else |
|||
{ |
|||
/* Charging Downstream Port CDP */ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); |
|||
#else |
|||
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
} |
|||
} |
|||
else /* NO */ |
|||
{ |
|||
/* Standard Downstream Port */ |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); |
|||
#else |
|||
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
} |
|||
|
|||
/* Battery Charging capability discovery finished Start Enumeration */ |
|||
(void)HAL_PCDEx_DeActivateBCD(hpcd); |
|||
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|||
hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); |
|||
#else |
|||
HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); |
|||
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|||
} |
|||
|
|||
|
|||
/**
|
|||
* @brief Activate LPM feature. |
|||
* @param hpcd PCD handle |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) |
|||
{ |
|||
|
|||
USB_TypeDef *USBx = hpcd->Instance; |
|||
hpcd->lpm_active = 1U; |
|||
hpcd->LPM_State = LPM_L0; |
|||
|
|||
USBx->LPMCSR |= USB_LPMCSR_LMPEN; |
|||
USBx->LPMCSR |= USB_LPMCSR_LPMACK; |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Deactivate LPM feature. |
|||
* @param hpcd PCD handle |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) |
|||
{ |
|||
USB_TypeDef *USBx = hpcd->Instance; |
|||
|
|||
hpcd->lpm_active = 0U; |
|||
|
|||
USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); |
|||
USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
|
|||
|
|||
/**
|
|||
* @brief Send LPM message to user layer callback. |
|||
* @param hpcd PCD handle |
|||
* @param msg LPM message |
|||
* @retval HAL status |
|||
*/ |
|||
__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(hpcd); |
|||
UNUSED(msg); |
|||
|
|||
/* NOTE : This function should not be modified, when the callback is needed,
|
|||
the HAL_PCDEx_LPM_Callback could be implemented in the user file |
|||
*/ |
|||
} |
|||
|
|||
/**
|
|||
* @brief Send BatteryCharging message to user layer callback. |
|||
* @param hpcd PCD handle |
|||
* @param msg LPM message |
|||
* @retval HAL status |
|||
*/ |
|||
__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(hpcd); |
|||
UNUSED(msg); |
|||
|
|||
/* NOTE : This function should not be modified, when the callback is needed,
|
|||
the HAL_PCDEx_BCD_Callback could be implemented in the user file |
|||
*/ |
|||
} |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
#endif /* defined (USB) */ |
|||
#endif /* HAL_PCD_MODULE_ENABLED */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
@ -1,849 +0,0 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32wbxx_ll_usb.c |
|||
* @author MCD Application Team |
|||
* @brief USB Low Layer HAL module driver. |
|||
* |
|||
* This file provides firmware functions to manage the following |
|||
* functionalities of the USB Peripheral Controller: |
|||
* + Initialization/de-initialization functions |
|||
* + I/O operation functions |
|||
* + Peripheral Control functions |
|||
* + Peripheral State functions |
|||
* |
|||
@verbatim |
|||
============================================================================== |
|||
##### How to use this driver ##### |
|||
============================================================================== |
|||
[..] |
|||
(#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure. |
|||
|
|||
(#) Call USB_CoreInit() API to initialize the USB Core peripheral. |
|||
|
|||
(#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. |
|||
|
|||
@endverbatim |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* <h2><center>© Copyright (c) 2019 STMicroelectronics. |
|||
* All rights reserved.</center></h2> |
|||
* |
|||
* This software component is licensed by ST under BSD 3-Clause license, |
|||
* the "License"; You may not use this file except in compliance with the |
|||
* License. You may obtain a copy of the License at: |
|||
* opensource.org/licenses/BSD-3-Clause |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32wbxx_hal.h" |
|||
|
|||
/** @addtogroup STM32WBxx_LL_USB_DRIVER
|
|||
* @{ |
|||
*/ |
|||
|
|||
#if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) |
|||
#if defined (USB) |
|||
/* Private typedef -----------------------------------------------------------*/ |
|||
/* Private define ------------------------------------------------------------*/ |
|||
/* Private macro -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private function prototypes -----------------------------------------------*/ |
|||
/* Private functions ---------------------------------------------------------*/ |
|||
|
|||
|
|||
/**
|
|||
* @brief Initializes the USB Core |
|||
* @param USBx USB Instance |
|||
* @param cfg pointer to a USB_CfgTypeDef structure that contains |
|||
* the configuration information for the specified USBx peripheral. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(USBx); |
|||
UNUSED(cfg); |
|||
|
|||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|||
only by USB OTG FS peripheral. |
|||
- This function is added to ensure compatibility across platforms. |
|||
*/ |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_EnableGlobalInt |
|||
* Enables the controller's Global Int in the AHB Config reg |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) |
|||
{ |
|||
uint32_t winterruptmask; |
|||
|
|||
/* Clear pending interrupts */ |
|||
USBx->ISTR = 0U; |
|||
|
|||
/* Set winterruptmask variable */ |
|||
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | |
|||
USB_CNTR_SUSPM | USB_CNTR_ERRM | |
|||
USB_CNTR_SOFM | USB_CNTR_ESOFM | |
|||
USB_CNTR_RESETM | USB_CNTR_L1REQM; |
|||
|
|||
/* Set interrupt mask */ |
|||
USBx->CNTR = (uint16_t)winterruptmask; |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_DisableGlobalInt |
|||
* Disable the controller's Global Int in the AHB Config reg |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) |
|||
{ |
|||
uint32_t winterruptmask; |
|||
|
|||
/* Set winterruptmask variable */ |
|||
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | |
|||
USB_CNTR_SUSPM | USB_CNTR_ERRM | |
|||
USB_CNTR_SOFM | USB_CNTR_ESOFM | |
|||
USB_CNTR_RESETM | USB_CNTR_L1REQM; |
|||
|
|||
/* Clear interrupt mask */ |
|||
USBx->CNTR &= (uint16_t)(~winterruptmask); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_SetCurrentMode Set functional mode |
|||
* @param USBx Selected device |
|||
* @param mode current core mode |
|||
* This parameter can be one of the these values: |
|||
* @arg USB_DEVICE_MODE Peripheral mode |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(USBx); |
|||
UNUSED(mode); |
|||
|
|||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
|||
only by USB OTG FS peripheral. |
|||
- This function is added to ensure compatibility across platforms. |
|||
*/ |
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_DevInit Initializes the USB controller registers |
|||
* for device mode |
|||
* @param USBx Selected device |
|||
* @param cfg pointer to a USB_CfgTypeDef structure that contains |
|||
* the configuration information for the specified USBx peripheral. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(cfg); |
|||
|
|||
/* Init Device */ |
|||
/* CNTR_FRES = 1 */ |
|||
USBx->CNTR = (uint16_t)USB_CNTR_FRES; |
|||
|
|||
/* CNTR_FRES = 0 */ |
|||
USBx->CNTR = 0U; |
|||
|
|||
/* Clear pending interrupts */ |
|||
USBx->ISTR = 0U; |
|||
|
|||
/*Set Btable Address*/ |
|||
USBx->BTABLE = BTABLE_ADDRESS; |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
#if defined (HAL_PCD_MODULE_ENABLED) |
|||
/**
|
|||
* @brief Activate and configure an endpoint |
|||
* @param USBx Selected device |
|||
* @param ep pointer to endpoint structure |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) |
|||
{ |
|||
HAL_StatusTypeDef ret = HAL_OK; |
|||
uint16_t wEpRegVal; |
|||
|
|||
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; |
|||
|
|||
/* initialize Endpoint */ |
|||
switch (ep->type) |
|||
{ |
|||
case EP_TYPE_CTRL: |
|||
wEpRegVal |= USB_EP_CONTROL; |
|||
break; |
|||
|
|||
case EP_TYPE_BULK: |
|||
wEpRegVal |= USB_EP_BULK; |
|||
break; |
|||
|
|||
case EP_TYPE_INTR: |
|||
wEpRegVal |= USB_EP_INTERRUPT; |
|||
break; |
|||
|
|||
case EP_TYPE_ISOC: |
|||
wEpRegVal |= USB_EP_ISOCHRONOUS; |
|||
break; |
|||
|
|||
default: |
|||
ret = HAL_ERROR; |
|||
break; |
|||
} |
|||
|
|||
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); |
|||
|
|||
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); |
|||
|
|||
if (ep->doublebuffer == 0U) |
|||
{ |
|||
if (ep->is_in != 0U) |
|||
{ |
|||
/*Set the endpoint Transmit buffer address */ |
|||
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
|
|||
if (ep->type != EP_TYPE_ISOC) |
|||
{ |
|||
/* Configure NAK status for the Endpoint */ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); |
|||
} |
|||
else |
|||
{ |
|||
/* Configure TX Endpoint to disabled state */ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); |
|||
} |
|||
} |
|||
else |
|||
{ |
|||
/*Set the endpoint Receive buffer address */ |
|||
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); |
|||
|
|||
/*Set the endpoint Receive buffer counter*/ |
|||
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
|
|||
/* Configure VALID status for the Endpoint*/ |
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); |
|||
} |
|||
} |
|||
/*Double Buffer*/ |
|||
else |
|||
{ |
|||
/* Set the endpoint as double buffered */ |
|||
PCD_SET_EP_DBUF(USBx, ep->num); |
|||
|
|||
/* Set buffer address for double buffered mode */ |
|||
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); |
|||
|
|||
if (ep->is_in == 0U) |
|||
{ |
|||
/* Clear the data toggle bits for the endpoint IN/OUT */ |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
|
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); |
|||
} |
|||
else |
|||
{ |
|||
/* Clear the data toggle bits for the endpoint IN/OUT */ |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
|
|||
if (ep->type != EP_TYPE_ISOC) |
|||
{ |
|||
/* Configure NAK status for the Endpoint */ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); |
|||
} |
|||
else |
|||
{ |
|||
/* Configure TX Endpoint to disabled state */ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); |
|||
} |
|||
|
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); |
|||
} |
|||
} |
|||
|
|||
return ret; |
|||
} |
|||
|
|||
/**
|
|||
* @brief De-activate and de-initialize an endpoint |
|||
* @param USBx Selected device |
|||
* @param ep pointer to endpoint structure |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) |
|||
{ |
|||
if (ep->doublebuffer == 0U) |
|||
{ |
|||
if (ep->is_in != 0U) |
|||
{ |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
|
|||
/* Configure DISABLE status for the Endpoint*/ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); |
|||
} |
|||
else |
|||
{ |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
|
|||
/* Configure DISABLE status for the Endpoint*/ |
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); |
|||
} |
|||
} |
|||
/*Double Buffer*/ |
|||
else |
|||
{ |
|||
if (ep->is_in == 0U) |
|||
{ |
|||
/* Clear the data toggle bits for the endpoint IN/OUT*/ |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
|
|||
/* Reset value of the data toggle bits for the endpoint out*/ |
|||
PCD_TX_DTOG(USBx, ep->num); |
|||
|
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); |
|||
} |
|||
else |
|||
{ |
|||
/* Clear the data toggle bits for the endpoint IN/OUT*/ |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
PCD_RX_DTOG(USBx, ep->num); |
|||
|
|||
/* Configure DISABLE status for the Endpoint*/ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); |
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); |
|||
} |
|||
} |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_EPStartXfer setup and starts a transfer over an EP |
|||
* @param USBx Selected device |
|||
* @param ep pointer to endpoint structure |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) |
|||
{ |
|||
uint32_t len; |
|||
uint16_t pmabuffer; |
|||
uint16_t wEPVal; |
|||
|
|||
/* IN endpoint */ |
|||
if (ep->is_in == 1U) |
|||
{ |
|||
/*Multi packet transfer*/ |
|||
if (ep->xfer_len > ep->maxpacket) |
|||
{ |
|||
len = ep->maxpacket; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len; |
|||
} |
|||
|
|||
/* configure and validate Tx endpoint */ |
|||
if (ep->doublebuffer == 0U) |
|||
{ |
|||
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); |
|||
PCD_SET_EP_TX_CNT(USBx, ep->num, len); |
|||
} |
|||
else |
|||
{ |
|||
/* double buffer bulk management */ |
|||
if (ep->type == EP_TYPE_BULK) |
|||
{ |
|||
if (ep->xfer_len_db > ep->maxpacket) |
|||
{ |
|||
/* enable double buffer */ |
|||
PCD_SET_EP_DBUF(USBx, ep->num); |
|||
|
|||
/* each Time to write in PMA xfer_len_db will */ |
|||
ep->xfer_len_db -= len; |
|||
|
|||
/* Fill the two first buffer in the Buffer0 & Buffer1 */ |
|||
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) |
|||
{ |
|||
/* Set the Double buffer counter for pmabuffer1 */ |
|||
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr1; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
ep->xfer_buff += len; |
|||
|
|||
if (ep->xfer_len_db > ep->maxpacket) |
|||
{ |
|||
ep->xfer_len_db -= len; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len_db; |
|||
ep->xfer_len_db = 0U; |
|||
} |
|||
|
|||
/* Set the Double buffer counter for pmabuffer0 */ |
|||
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr0; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
} |
|||
else |
|||
{ |
|||
/* Set the Double buffer counter for pmabuffer0 */ |
|||
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr0; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
ep->xfer_buff += len; |
|||
|
|||
if (ep->xfer_len_db > ep->maxpacket) |
|||
{ |
|||
ep->xfer_len_db -= len; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len_db; |
|||
ep->xfer_len_db = 0U; |
|||
} |
|||
|
|||
/* Set the Double buffer counter for pmabuffer1 */ |
|||
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr1; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
} |
|||
} |
|||
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */ |
|||
else |
|||
{ |
|||
len = ep->xfer_len_db; |
|||
|
|||
/* disable double buffer mode */ |
|||
PCD_CLEAR_EP_DBUF(USBx, ep->num); |
|||
|
|||
/* Set Tx count with nbre of byte to be transmitted */ |
|||
PCD_SET_EP_TX_CNT(USBx, ep->num, len); |
|||
pmabuffer = ep->pmaaddr0; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
} |
|||
}/* end if bulk double buffer */ |
|||
|
|||
/* manage isochronous double buffer IN mode */ |
|||
else |
|||
{ |
|||
/* enable double buffer */ |
|||
PCD_SET_EP_DBUF(USBx, ep->num); |
|||
|
|||
/* each Time to write in PMA xfer_len_db will */ |
|||
ep->xfer_len_db -= len; |
|||
|
|||
/* Fill the data buffer */ |
|||
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) |
|||
{ |
|||
/* Set the Double buffer counter for pmabuffer1 */ |
|||
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr1; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
ep->xfer_buff += len; |
|||
|
|||
if (ep->xfer_len_db > ep->maxpacket) |
|||
{ |
|||
ep->xfer_len_db -= len; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len_db; |
|||
ep->xfer_len_db = 0U; |
|||
} |
|||
|
|||
if (len > 0U) |
|||
{ |
|||
/* Set the Double buffer counter for pmabuffer0 */ |
|||
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr0; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
} |
|||
} |
|||
else |
|||
{ |
|||
/* Set the Double buffer counter for pmabuffer0 */ |
|||
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr0; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
ep->xfer_buff += len; |
|||
|
|||
if (ep->xfer_len_db > ep->maxpacket) |
|||
{ |
|||
ep->xfer_len_db -= len; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len_db; |
|||
ep->xfer_len_db = 0U; |
|||
} |
|||
|
|||
if (len > 0U) |
|||
{ |
|||
/* Set the Double buffer counter for pmabuffer1 */ |
|||
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); |
|||
pmabuffer = ep->pmaaddr1; |
|||
|
|||
/* Write the user buffer to USB PMA */ |
|||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); |
|||
} |
|||
} |
|||
} |
|||
} |
|||
|
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); |
|||
} |
|||
else /* OUT endpoint */ |
|||
{ |
|||
if (ep->doublebuffer == 0U) |
|||
{ |
|||
/* Multi packet transfer */ |
|||
if (ep->xfer_len > ep->maxpacket) |
|||
{ |
|||
len = ep->maxpacket; |
|||
ep->xfer_len -= len; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len; |
|||
ep->xfer_len = 0U; |
|||
} |
|||
/* configure and validate Rx endpoint */ |
|||
PCD_SET_EP_RX_CNT(USBx, ep->num, len); |
|||
} |
|||
else |
|||
{ |
|||
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ |
|||
/* Set the Double buffer counter */ |
|||
if (ep->type == EP_TYPE_BULK) |
|||
{ |
|||
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); |
|||
|
|||
/* Coming from ISR */ |
|||
if (ep->xfer_count != 0U) |
|||
{ |
|||
/* update last value to check if there is blocking state */ |
|||
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); |
|||
|
|||
/*Blocking State */ |
|||
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || |
|||
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) |
|||
{ |
|||
PCD_FreeUserBuffer(USBx, ep->num, 0U); |
|||
} |
|||
} |
|||
} |
|||
/* iso out double */ |
|||
else if (ep->type == EP_TYPE_ISOC) |
|||
{ |
|||
/* Multi packet transfer */ |
|||
if (ep->xfer_len > ep->maxpacket) |
|||
{ |
|||
len = ep->maxpacket; |
|||
ep->xfer_len -= len; |
|||
} |
|||
else |
|||
{ |
|||
len = ep->xfer_len; |
|||
ep->xfer_len = 0U; |
|||
} |
|||
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); |
|||
} |
|||
else |
|||
{ |
|||
return HAL_ERROR; |
|||
} |
|||
} |
|||
|
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); |
|||
} |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
|
|||
/**
|
|||
* @brief USB_EPSetStall set a stall condition over an EP |
|||
* @param USBx Selected device |
|||
* @param ep pointer to endpoint structure |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) |
|||
{ |
|||
if (ep->is_in != 0U) |
|||
{ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); |
|||
} |
|||
else |
|||
{ |
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); |
|||
} |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_EPClearStall Clear a stall condition over an EP |
|||
* @param USBx Selected device |
|||
* @param ep pointer to endpoint structure |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) |
|||
{ |
|||
if (ep->doublebuffer == 0U) |
|||
{ |
|||
if (ep->is_in != 0U) |
|||
{ |
|||
PCD_CLEAR_TX_DTOG(USBx, ep->num); |
|||
|
|||
if (ep->type != EP_TYPE_ISOC) |
|||
{ |
|||
/* Configure NAK status for the Endpoint */ |
|||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); |
|||
} |
|||
} |
|||
else |
|||
{ |
|||
PCD_CLEAR_RX_DTOG(USBx, ep->num); |
|||
|
|||
/* Configure VALID status for the Endpoint */ |
|||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); |
|||
} |
|||
} |
|||
|
|||
return HAL_OK; |
|||
} |
|||
#endif |
|||
|
|||
/**
|
|||
* @brief USB_StopDevice Stop the usb device mode |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx) |
|||
{ |
|||
/* disable all interrupts and force USB reset */ |
|||
USBx->CNTR = (uint16_t)USB_CNTR_FRES; |
|||
|
|||
/* clear interrupt status register */ |
|||
USBx->ISTR = 0U; |
|||
|
|||
/* switch-off device */ |
|||
USBx->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_SetDevAddress Stop the usb device mode |
|||
* @param USBx Selected device |
|||
* @param address new device address to be assigned |
|||
* This parameter can be a value from 0 to 255 |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) |
|||
{ |
|||
if (address == 0U) |
|||
{ |
|||
/* set device address and enable function */ |
|||
USBx->DADDR = (uint16_t)USB_DADDR_EF; |
|||
} |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) |
|||
{ |
|||
/* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */ |
|||
USBx->BCDR |= (uint16_t)USB_BCDR_DPPU; |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) |
|||
{ |
|||
/* Disable DP Pull-Up bit to disconnect the Internal PU resistor on USB DP line */ |
|||
USBx->BCDR &= (uint16_t)(~(USB_BCDR_DPPU)); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_ReadInterrupts return the global USB interrupt status |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx) |
|||
{ |
|||
uint32_t tmpreg; |
|||
|
|||
tmpreg = USBx->ISTR; |
|||
return tmpreg; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_ActivateRemoteWakeup : active remote wakeup signalling |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx) |
|||
{ |
|||
USBx->CNTR |= (uint16_t)USB_CNTR_RESUME; |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief USB_DeActivateRemoteWakeup de-active remote wakeup signalling |
|||
* @param USBx Selected device |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) |
|||
{ |
|||
USBx->CNTR &= (uint16_t)(~USB_CNTR_RESUME); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Copy a buffer from user memory area to packet memory area (PMA) |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param pbUsrBuf pointer to user memory area. |
|||
* @param wPMABufAddr address into PMA. |
|||
* @param wNBytes no. of bytes to be copied. |
|||
* @retval None |
|||
*/ |
|||
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) |
|||
{ |
|||
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; |
|||
uint32_t BaseAddr = (uint32_t)USBx; |
|||
uint32_t i, temp1, temp2; |
|||
__IO uint16_t *pdwVal; |
|||
uint8_t *pBuf = pbUsrBuf; |
|||
|
|||
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); |
|||
|
|||
for (i = n; i != 0U; i--) |
|||
{ |
|||
temp1 = *pBuf; |
|||
pBuf++; |
|||
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8)); |
|||
*pdwVal = (uint16_t)temp2; |
|||
pdwVal++; |
|||
|
|||
#if PMA_ACCESS > 1U |
|||
pdwVal++; |
|||
#endif |
|||
|
|||
pBuf++; |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* @brief Copy data from packet memory area (PMA) to user memory buffer |
|||
* @param USBx USB peripheral instance register address. |
|||
* @param pbUsrBuf pointer to user memory area. |
|||
* @param wPMABufAddr address into PMA. |
|||
* @param wNBytes no. of bytes to be copied. |
|||
* @retval None |
|||
*/ |
|||
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) |
|||
{ |
|||
uint32_t n = (uint32_t)wNBytes >> 1; |
|||
uint32_t BaseAddr = (uint32_t)USBx; |
|||
uint32_t i, temp; |
|||
__IO uint16_t *pdwVal; |
|||
uint8_t *pBuf = pbUsrBuf; |
|||
|
|||
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); |
|||
|
|||
for (i = n; i != 0U; i--) |
|||
{ |
|||
temp = *(__IO uint16_t *)pdwVal; |
|||
pdwVal++; |
|||
*pBuf = (uint8_t)((temp >> 0) & 0xFFU); |
|||
pBuf++; |
|||
*pBuf = (uint8_t)((temp >> 8) & 0xFFU); |
|||
pBuf++; |
|||
|
|||
#if PMA_ACCESS > 1U |
|||
pdwVal++; |
|||
#endif |
|||
} |
|||
|
|||
if ((wNBytes % 2U) != 0U) |
|||
{ |
|||
temp = *pdwVal; |
|||
*pBuf = (uint8_t)((temp >> 0) & 0xFFU); |
|||
} |
|||
} |
|||
|
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
#endif /* defined (USB) */ |
|||
#endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|||
Loading…
Reference in new issue